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Multiple bit upset insensitive error detection and correction circuit for field programmable gate array based on static random access memory blocks

机译:基于静态随机存取存储块的现场可编程门阵列的多位不敏感错误检测与校正电路

摘要

A method for detecting and correcting bit errors. The method includes the steps of receiving original data, partitioning the memory storage into a first portion and a second portion, storing the original data in the first portion of the memory buffer, modifying the original data into modified data, storing the modified data in the second portion of the memory buffer, comparing the original data with the modified data, combining the original data and the modified data to create a final data stream, and outputting the final data stream. The method may further include the step of calculating and storing parity data.
机译:一种检测和纠正位错误的方法。该方法包括以下步骤:接收原始数据,将存储器存储分为第一部分和第二部分,将原始数据存储在存储器缓冲器的第一部分中,将原始数据修改为修改后的数据,将修改后的数据存储在存储器中。存储器缓冲器的第二部分,将原始数据与修改后的数据进行比较,将原始数据和修改后的数据组合以创建最终数据流,并输出最终数据流。该方法可以进一步包括计算和存储奇偶校验数据的步骤。

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