CODER

机译:编码器

摘要

A coder has a binarizing circuit (130) for converting multivalued data into a binary symbol sequence, the multivalued data being generated from an input signal and having a plurality of contexts, an arithmetic code amount approximating circuit (200) for calculating a prediction code amount in the predetermined coding unit from the binary symbol sequence, and a coding circuit (102) for coding the input signal arithmetically on the basis of the prediction code amount. The arithmetic code amount approximating circuit (200) includes a selector (230) for dividing the binary symbol sequence into a plurality of groups based on the contexts, a plurality of code amount approximating circuits (211-214) for calculating, from the binary symbol sequence divided into a plurality of groups, the prediction code amount of the group based on at least the section range in arithmetic coding, and an adder (231) for adding the prediction code amounts from all code amount approximating circuits and outputting the prediction code amount in the specified coding unit.
机译:编码器具有用于将多值数据转换成二进制符号序列的二值化电路(130),该多值数据是从输入信号生成并具有多个上下文的;以及算术码量近似电路(200),用于计算预测码量根据二进制码元序列,在预定的编码单元中对输入信号进行编码;编码电路(102),用于根据预测代码量对输入信号进行算术编码。算术代码量近似电路(200)包括:选择器(230),用于基于上下文将二进制符号序列划分为多个组;多个代码量近似电路(211-214),用于根据二进制符号来计算分为多个组的序列,至少基于算术编码中的区间范围的组的预测代码量,以及用于将来自所有代码量近似电路的预测代码量相加并输出预测代码量的加法器(231)以指定的编码单位。

著录项

  • 公开/公告号EP2091257A4

    专利类型

  • 公开/公告日2011-06-22

    原文格式PDF

  • 申请/专利权人 PANASONIC CORPORATION;

    申请/专利号EP20070829562

  • 发明设计人 TANAKA TOSHIHIRO;ISHIDA KEIICHI;

    申请日2007-10-11

  • 分类号H03M7/40;H04N1/41;H04N19/00;H04N19/13;H04N19/134;H04N19/136;H04N19/146;H04N19/189;H04N19/423;H04N19/593;H04N19/60;H04N19/61;H04N19/625;H04N19/85;H04N19/91;

  • 国家 EP

  • 入库时间 2022-08-21 17:57:46

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