Multithread processor with efficient processing for convergence device applications

摘要

There is disclosed a multithreaded processor comprising: an instruction decoder for decoding instructions to determine an instruction type for each of at least a subset of the instructions; an integer unit coupled to the instruction decoder for processing integer type instructions received from the instruction decoder; and a vector unit coupled to the instruction decoder for processing vector type instructions received from the instruction decoder, wherein the processor is configured to utilize token triggered threading.