The stage has four N-channel metal oxide semiconductor transistors (N25-N31-N33) arranged between output and voltage application terminals (9, 7). The first transistor has a gate directly connected to an input terminal (24). The second and third transistors are arranged, in series, between the output terminal and the first transistor. A gate of the second transistor is connected to a midpoint of resistive dividing bridges i.e. resistors (R1, R2), between the output terminal and the gate of the third transistor, where the gate of the third transistor is biased to a fixed voltage (V-G32).
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