Low voltage 2-stage and 3-stage push-pull output amplifiers in 65-nm CMOS technology

摘要

A new low-voltage push-pull output stage is proposed. It can be adapted for use in low-voltage two-stage or multi-stage amplifiers. A 2-stage amplifier and a 3-stage amplifier were fabricated using this output stage in a 65-nm CMOS process with threshold voltages of 0.35V for p-channel and 0.5V for n-channel devices. Silicon measurements show both the amplifiers are able to operate with a power supply voltage range of 0.7V to 1.5V. Detailed simulation and measurement results that compare the performances of the two amplifiers are provided when stand-alone as well as in an application.