首页> 外国专利> DYNAMIC DOMINO CIRCUIT, CAPABLE OF IMPROVING THE OPERATIONAL SPEED AND THE RELIABILITY BY INCLUDING EFFICIENT INTERFACE WITH RESPECT TO A STATIC LOGIC

DYNAMIC DOMINO CIRCUIT, CAPABLE OF IMPROVING THE OPERATIONAL SPEED AND THE RELIABILITY BY INCLUDING EFFICIENT INTERFACE WITH RESPECT TO A STATIC LOGIC

机译:动态多米诺电路,可通过将有效接口纳入静态逻辑来提高操作速度和可靠性

摘要

PURPOSE: A dynamic domino circuit is provided to prevent the generation of malfunctions by efficiently controlling the phase and the duty ratio of a plurality of internal clock signals.;CONSTITUTION: A clock generator(100) generates a plurality of internal clock signals(CK) with pulse signals(P) and phases based on a global clock signal(GCLK). The phases of the internal clock signals are successively delayed. A domino circuit(200) successively performs a plurality of logic operations based on input signals(IN), the pulse signals, and the internal clock signals. The domino circuit generates an output signal(Q) synchronized with the pulse signal.;COPYRIGHT KIPO 2011
机译:目的:提供一种动态多米诺电路,通过有效地控制多个内部时钟信号的相位和占空比来防止故障的发生。组成:时钟发生器(100)产生多个内部时钟信号(CK)具有脉冲信号(P)和基于全局时钟信号(GCLK)的相位。内部时钟信号的相位被连续延迟。多米诺电路(200)基于输入信号(IN),脉冲信号和内部时钟信号依次执行多个逻辑运算。多米诺电路产生与脉冲信号同步的输出信号(Q)。;COPYRIGHT KIPO 2011

著录项

  • 公开/公告号KR20100134937A

    专利类型

  • 公开/公告日2010-12-24

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20090053307

  • 发明设计人 KIM MIN SU;

    申请日2009-06-16

  • 分类号H03K19/0944;H03K19/096;

  • 国家 KR

  • 入库时间 2022-08-21 17:53:05

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号