首页>
外国专利>
NOR FLASH MEMORY ARRAY WITH VERTICAL CHANNEL BUILTIN FIN-SPLIT LAYER
NOR FLASH MEMORY ARRAY WITH VERTICAL CHANNEL BUILTIN FIN-SPLIT LAYER
展开▼
机译:NOR快闪记忆体阵列搭配垂直通道BUILTIN鳍片层
展开▼
页面导航
摘要
著录项
相似文献
摘要
PURPOSE: A NOR flash memory array of a vertical channel embedding a fin separation layer is provided to prevent a leakage current between bit lines by arranging the pin separation layer between the silicon fins. CONSTITUTION: A NOR flash memory array includes a silicon substrate(10), a charge storage(60), and a gate line(70). The silicon substrate has the silicon fins(12a,12b). The charge storage is arranged on the silicon fins. The gate lines are positioned on the charge storage and cross the silicon fins. The NOR flash memory array includes a fin separation layer(11). The fin separation layer is arranged between the silicon fins.
展开▼