首页> 外国专利> METHOD WHICH MANUFACTURES A SEMICONDUCTOR DEVICE HAVING A VERTICAL TRANSISTOR, CAPABLE OF CONTROLLING THE CHANNEL LENGTH OF A VERTICAL GATE THROUGH THE ETCHING PROCESS OF A FIRST ACTIVE PILLAR

METHOD WHICH MANUFACTURES A SEMICONDUCTOR DEVICE HAVING A VERTICAL TRANSISTOR, CAPABLE OF CONTROLLING THE CHANNEL LENGTH OF A VERTICAL GATE THROUGH THE ETCHING PROCESS OF A FIRST ACTIVE PILLAR

机译:制造具有垂直晶体管的半导体器件的方法,该器件能够通过第一有源柱的蚀刻过程来控制垂直门的通道长度

摘要

PURPOSE: A method is provided to effectively remove a gate conductive layer in the upper side wall of an active pillar by forming a vertical gate after forming a first active pillar.;CONSTITUTION: A first active pillar(22) is formed on a substrate(21). A gate conductive layer(27) protects the side wall between the first active pillar and a hard mask layer. A word line conductive layer fills a space between the gate conductive layers. A word line(33A) and a vertical gate(27A) are formed by simultaneously removing a part of the word line conductive layer and the gate conductive layer. An interlayer insulating layer(28A) is formed in a front side including the word line. A second active pillar(35) is formed on the first active pillar.;COPYRIGHT KIPO 2011
机译:目的:提供一种通过在形成第一有源柱之后形成垂直栅极来有效去除有源柱上侧壁中的栅极导电层的方法;组成:在基板上形成第一有源柱(22)( 21)。栅极导电层(27)保护第一有源柱和硬掩模层之间的侧壁。字线导电层填充栅极导电层之间的空间。通过同时去除一部分字线导电层和栅极导电层来形成字线(33A)和垂直栅极(27A)。在包括字线的正面形成层间绝缘层(28A)。在第一个活动支柱上形成第二个活动支柱(35)。; COPYRIGHT KIPO 2011

著录项

  • 公开/公告号KR20110003219A

    专利类型

  • 公开/公告日2011-01-11

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20090060878

  • 发明设计人 KIM EUN JEONG;AHN SANG TAE;

    申请日2009-07-03

  • 分类号H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 17:52:46

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