RESISTIVE MEMORY DEVICE HAVING A VERTICAL ARRAY TRANSISTOR, CAPABLE OF USING THE RESISTANCE VARIATION PROPERTIES OF A RESISTANCE VARIATION MATERIAL

摘要

PURPOSE: A resistive memory device having a vertical array transistor is provided to reduce a leakage current between memory cells through a word line by forming an element isolation layer on a word line making a resistance variation layer not contact the word line.;CONSTITUTION: In a resistive memory device having a vertical array transistor, a gate electrode is formed on a semiconductor substrate. A gate insulating layer(34) is contacted with a part of the gate electrode. A vertical transistor is composed of a single crystal silicon layer. The single crystal silicon layer is contacted with the gate insulating layer and is formed on the semiconductor layer. The single crystal silicon layer has a channel layer which is perpendicular to the semiconductor layer. A memory cell is insulated with the gate electrode and is contacted with the single crystal silicon layer to form a resistance variation layer.;COPYRIGHT KIPO 2011