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SEMICONDUCTOR MEMORY DEVICE REDUCING THE RESISTANCE VARIATION OF A DATA TRANSMISSION LINE, CAPABLE OF COMPENSATING THE RESISTANCE VARIATION OF AN INTERCONNECTION
SEMICONDUCTOR MEMORY DEVICE REDUCING THE RESISTANCE VARIATION OF A DATA TRANSMISSION LINE, CAPABLE OF COMPENSATING THE RESISTANCE VARIATION OF AN INTERCONNECTION
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机译:减少数据传输线电阻变化的半导体存储器,能够补偿互连电阻变化
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摘要
PURPOSE: A semiconductor memory device reducing the resistance variation of a data transmission line are provided to make the resistance of a interconnection by combining a low resistance interconnection and high resistance interconnection to form a data transmission line.;CONSTITUTION: A second memory cell block(1b) is adjacent to a first memory cell block(1a) in a first direction. An interconnection rerouting unit is interposed between first and second memory cell blocks. The first memory cell block includes a plurality of first and second units and a plurality of interconnections. A first interconnection is connected to the end of the first cell unit respectively. The second interconnection is connected to the end of the second cell unit respectively.;COPYRIGHT KIPO 2011
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