首页> 外国专利> CHIP STACKING PACKAGE OF A WAFER LEVEL CAPABLE OF IMPROVING THE PRODUCTION YIELD OF A PACKAGE AND A MANUFACTURING METHOD THEREOF

CHIP STACKING PACKAGE OF A WAFER LEVEL CAPABLE OF IMPROVING THE PRODUCTION YIELD OF A PACKAGE AND A MANUFACTURING METHOD THEREOF

机译:能够提高包装件产量的晶片级芯片堆叠包装件及其制造方法

摘要

PURPOSE: A chip stacking package of a wafer level and a manufacturing method thereof are provided to shorten a package assembly time by forming a rewiring line which replaces an under-fill material with copper filler.;CONSTITUTION: A bonding pad is formed in the upper side of a lower chip. The bonding pad is formed in the bottom surface of an upper chip(100). A flip chip(302) interlinks the bonding pad of the upper chip and the bonding pad of the lower chip. An under-fill material(300) is filled in a space between the lower chip and the upper chip. A rewiring line(304) is connected to be conductible to the bonding pad of the outside side of the lower chip.;COPYRIGHT KIPO 2012
机译:目的:提供一种晶圆级芯片堆叠封装及其制造方法,通过形成一条用铜填料代替底部填充材料的重新布线来缩短封装组装时间。组成:上部形成焊盘较低芯片的一侧。结合焊盘形成在上芯片(100)的底表面中。倒装芯片(302)将上芯片的键合焊盘和下芯片的键合焊盘互连。在下部芯片和上部芯片之间的空间中填充底部填充材料(300)。连接了一条重新布线(304),以可导电连接到下芯片外侧的焊盘上; COPYRIGHT KIPO 2012

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