首页> 外国专利> METHOD FOR JOINTING AND FORMING THE VERTICAL CELL OF A SEMICONDUCTOR CAPABLE OF FORMING JUNCTION DEPTH TO BE SHALLOW AND APPLYING A DIFFUSION CONTROL FILM

METHOD FOR JOINTING AND FORMING THE VERTICAL CELL OF A SEMICONDUCTOR CAPABLE OF FORMING JUNCTION DEPTH TO BE SHALLOW AND APPLYING A DIFFUSION CONTROL FILM

机译:能够形成结深度浅的半导体的垂直单元的连接和形成方法以及应用扩散控制膜的方法

摘要

PURPOSE: A method for jointing and forming the vertical cell of a semiconductor is provided to improve the step coverage of a diffusion control film which is formed in a subsequent process by forming an undoped film which fills the opening of an insulating layer.;CONSTITUTION: An active area(303), which is separated with a trench(302), is formed in a substrate(301). An insulating layer with an opening is formed in the sidewall of the active area. The undoped film(309A) filling the opening is formed. A diffusion control film(310) is formed in the front which includes the undoped film. Junction(313) is formed in the part of an exposed sidewall.;COPYRIGHT KIPO 2012
机译:目的:提供一种用于接合和形成半导体垂直单元的方法,以通过形成用于填充绝缘层开口的未掺杂膜来改善在后续工艺中形成的扩散控制膜的阶梯覆盖率。与沟槽(302)隔开的有源区(303)形成在衬底(301)中。在有源区的侧壁中形成具有开口的绝缘层。形成填充开口的未掺杂膜(309A)。在包括未掺杂膜的正面形成扩散控制膜(310)。结(313)形成在外露侧壁的一部分中。; COPYRIGHT KIPO 2012

著录项

  • 公开/公告号KR20110121346A

    专利类型

  • 公开/公告日2011-11-07

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20100040901

  • 发明设计人 LEE BO MI;

    申请日2010-04-30

  • 分类号H01L21/336;H01L29/78;

  • 国家 KR

  • 入库时间 2022-08-21 17:50:46

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