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WAVEFORM-BASED DIGITAL GATE MODELING FOR TIMING ANALYSIS
WAVEFORM-BASED DIGITAL GATE MODELING FOR TIMING ANALYSIS
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机译:基于波形的数字门建模以进行时序分析
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摘要
In one embodiment, the invention is a method and apparatus for waveform-based digital gate modeling for timing analysis. One embodiment of a method for modeling a gate of an integrated circuit chip includes building a transform matrix that indexes each input waveform/output waveform pair in a gate library to a plurality of different capacitive loads, obtaining an input waveform and a capacitive load associated with the gate, and, mapping the input waveform and the capacitive load to an output waveform for the gate, in accordance with the transform matrix.
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