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PLI N-BIT CORRECTION CIRCUIT, GFP LAYER 2 SYNCHRONIZATION CIRCUIT AND GFP FRAME TRANSFER DEVICE USING IT
PLI N-BIT CORRECTION CIRCUIT, GFP LAYER 2 SYNCHRONIZATION CIRCUIT AND GFP FRAME TRANSFER DEVICE USING IT
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机译:使用它的PLI N位校正电路,GFP层2同步电路和GFP帧传输设备
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摘要
A PLI n-bit correction circuit extracts a core header (PLI) from a GFP frame with a fixed payload length; compares it with a predetermined expectation value for each bit; calculates the number of inconsistent bits therebetween; and outputs the predetermined expectation value, instead of the core header, when the number of inconsistent bits is equal to or less than n (n is a natural number); or directly outputs the core header when the number of inconsistent bits is greater than n. A decision on establishment of GFP Layer 2 synchronization is made based on the output of the PLI n-bit correction circuit, wherein predetermined processing is executed on a payload of a GFP frame dropping its core header when GFP Layer 2 synchronization is established, whilst the payload is not subjected to predetermined processing and discarded in the event of GFP Layer 2 desynchronization.
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