PLT n-BIT CORRECTION CIRCUIT, AND GFP LAYER 2 SYNCHRONIZATION CIRCUIT AND GFP FRAME TRANSMISSION APPARATUS USING THE SAME

摘要

A PLI n-bit correction circuit extracts a core header (PLI) from a GFP frame having a fixed payload length; compares the bits of the core header with the bits of a predetermined expected value; calculates the number of non-matching bits from the two; outputs the predetermined expected value, in place of the core header, in cases when the number of non-matching bits is n (where n is a natural number) or less; and outputs the core header without change in cases when the number of non-matching bits is larger than n. Based on the output of the PLI n-bit correction circuit, GFP layer 2 synchronization is assessed, and predetermined processing is performed on the payload of the GFP frame, the core header of which is dropped, in cases when GFP layer 2 synchronization is established, while the payload is discarded without predetermined processing in cases when GFP layer 2 synchronization is not established.