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Layered quasi-cyclic LDPC decoder with reduced-complexity circular shifter

机译:具有降低复杂度的圆形移位器的分层准循环LDPC解码器

摘要

This disclosure relates generally to data decoding, and more particularly to iterative decoders for data encoded with a low-density parity check (LDPC) encoder. LDPC decoders are disclosed that use reduced-complexity circular shifters that may be used to decode predefined or designed QC-LDPC codes. In addition, methods to design codes which may have particular LDPC code performance capabilities and which may operate with such decoders using reduced-complexity circular shifters are provided. The generation of quasi-cyclic low density parity check codes and the use of circular shifters by LDPC decoders, may be done in such a way as to provide increased computational efficiency, decreased routing congestion, easier timing closure, and improved application performance.
机译:本公开总体上涉及数据解码,并且更具体地涉及用于用低密度奇偶校验(LDPC)编码器编码的数据的迭代解码器。公开了使用降低复杂度的圆形移位器的LDPC解码器,该移位器可用于解码预定义或设计的QC-LDPC码。另外,提供了用于设计可以具有特定的LDPC码性能能力并且可以使用降低复杂度的圆形移位器与这样的解码器一起操作的代码的方法。准循环低密度奇偶校验码的产生以及LDPC解码器使用循环移位器的方式可以提高计算效率,减少路由拥塞,更容易实现时序收敛并提高应用程序性能。

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