首页> 外国专利> Ultra-Shallow Junction MOSFET Having a High-k Gate Dielectric and In-Situ Doped Selective Epitaxy Source/Drain Extensions and a Method of Making Same

Ultra-Shallow Junction MOSFET Having a High-k Gate Dielectric and In-Situ Doped Selective Epitaxy Source/Drain Extensions and a Method of Making Same

机译:具有高k栅极介电和原位掺杂选择性外延源极/漏极扩展的超浅结MOSFET及其制造方法

摘要

A MOSFET includes a gate having a high-k gate dielectric on a substrate and a gate electrode on the gate dielectric. The gate dielectric protrudes beyond the gate electrode. A deep source and drain having shallow extensions are formed on either side of the gate. The deep source and drain are formed by selective in-situ doped epitaxy or by ion implantation and the extensions are formed by selective, in-situ doped epitaxy. The extensions lie beneath the gate in contact with the gate dielectric. The material of the gate dielectric and the amount of its protrusion beyond the gate electrode are selected so that epitaxial procedures and related procedures do not cause bridging between the gate electrode and the source/drain extensions. Methods of fabricating the MOSFET are described.
机译:MOSFET包括具有在衬底上的高k栅极电介质和在栅极电介质上的栅电极的栅极。栅极电介质突出到栅电极之外。在栅极的任一侧上形成具有浅延伸的深的源极和漏极。深源极和漏极通过选择性的原位掺杂外延或离子注入形成,而延伸部分则通过选择性的原位掺杂外延形成。延伸部分位于与栅极电介质接触的栅极下方。选择栅电介质的材料及其在栅电极之外的突出量,以使外延工艺和相关工艺不会在栅电极和源/漏扩展之间造成桥接。描述了制造MOSFET的方法。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号