A NEW LOW VOLTAGE AND LOW POWER MEMORY CELL BASED ON NANO CURRENT VOLTAGE DIVIDER CONTROLLED LOW VOLTAGE SENSE MOSFET

摘要

A memory cell has at least two word lines and at least two bit lines. The cell also has a first select device being connected to at least one word line and one bit line and a gate capacitor element connected to at least one word line and the first select device. The cell also has a sense device being connected in series to the gate capacitor element and the first select device. The sense device is connected to at least two bit lines.