METHOD FOR FABRICATING SILICON-ON-INSULATOR (SOI) HIGH-VOLTAGE POWER DEVICE CHIP WITH TRENCH STRUCTURE

摘要

A method for fabricating a silicon-on-insulator (SOI) high-voltage power device chip with a trench structure is provided. The method includes forming a recess region and at least one isolation trench (25a, 25b) on the surface of the SOI substrate; filling the recess region with oxide (24a), and at the same time performing oxidation treatment to the isolation trench (25a, 25b) and the local area of preparation to form low voltage devices to make a complete oxidation of the residual top silicon part at the position corresponding to the isolation trench; filling the isolation trench (25a, 25b) with oxide; performing a series of processes including doping and depositing to form P-type regions (29a, 29b, 29c, 271b, 272b), N-type regions (30, 271c, 272c) and gate regions (28, 272a) as the drains, the sources, and the gates of the high-voltage power device and the low-voltage device, respectively; depositing an oxide layer (31) to make the thicknesses of the oxide layers (22, 31) on two sides of the top silicon layer (23) of the SOI substrate probably the same and to form a symmetrical structure; and growing metal sub-regions (32, 33) contacting each of the P-type regions(29a, 29b, 29c, 271b, 272b), the N-type regions (30, 271c, 272c) and the gate regions (28, 272a) respectively to form a multi-device chip withstanding a high voltage over 700 V.