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SEMICONDUCTOR MEMORY DEVICE, A TEST CIRCUIT, AND A TESTING METHOD CAPABLE OF REDUCING TIME OF TESTING A PLURALITY OF UNIT CELLS
SEMICONDUCTOR MEMORY DEVICE, A TEST CIRCUIT, AND A TESTING METHOD CAPABLE OF REDUCING TIME OF TESTING A PLURALITY OF UNIT CELLS
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机译:可减少多个单元电池测试时间的半导体存储器,测试电路和测试方法
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摘要
PURPOSE: A semiconductor memory device, a test circuit, and a testing method are provided to inform a user of a fail state in a test mode.;CONSTITUTION: A path selecting unit transmits a first data inputted through a first data pad to a first memory cell and a second memory cell in a test mode. A test mode control unit(200) compares the first data of the first and second memory cells and controls one of a plurality of first data pads to show a fail state according to the comparison result in the test mode. The test mode control unit controls one of the plurality of the first data pads to show a stuck state after a read operation is completed when the fail state is sensed.;COPYRIGHT KIPO 2012
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