首页> 外国专利> Method for fabricating e.g. triple silicon-on-insulator structure used for forming resonant tunneling diode, involves implementing partial dissolution of buried electrically insulating layer farthest from substrate for thinning down layer

Method for fabricating e.g. triple silicon-on-insulator structure used for forming resonant tunneling diode, involves implementing partial dissolution of buried electrically insulating layer farthest from substrate for thinning down layer

机译:例如制造方法用于形成谐振隧穿二极管的三层绝缘体上硅结构,涉及对离衬底最远的埋入电绝缘层进行部分溶解以减薄层

摘要

The method involves implementing partial dissolution of a buried electrically insulating layer (2a) e.g. silicon dioxide layer, farthest from a carrier substrate (1) of semiconductor-on-insulator structure (10) for thinning down the layer till thickness of the layer is less than 10 nm, where the substrate supports the layer and another buried electrically insulating layer (2b). The partial dissolution is implemented by furnace annealing under argon atmosphere, where the layers are superimposed alternately with semiconductor layers (3a, 3b) e.g. amorphous/single-crystal silicon layers.
机译:该方法包括实施例如电沉积的绝缘层(2a)的部分溶解。距绝缘体上半导体结构(10)的载体衬底(1)最远的二氧化硅层,用于减薄该层直到该层的厚度小于10 nm,其中该衬底支撑该层和另一个掩埋的电绝缘层(2b)。通过在氩气气氛下的炉子退火来实现部分溶解,其中各层与半导体层(3a,3b)例如交替地叠置。非晶/单晶硅层。

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