Control method of the FIFO buffer and FIFO buffer

摘要

A first-in first-out buffer (1) includes: a packet storage buffer (10) capable of writing and reading data within one cycle by combining a plurality of memories, each memory performing any one of writing and reading of data within one cycle; a bank switch (17) that outputs a W_bank signal indicating a memory included in the packet storage buffer (10), the memory being capable of writing data; a packet writing control circuit (15) that performs writing control of data to be written to the memory indicated by the W_bank signal when the data to be written is inputted; and a packet writing beginning bank holding FIFO queue (19) that, in accordance with a queue writing signal "1" from the packet writing control circuit (15), holds the W_bank signal that is outputted from the bank switch (17) and indicates the memory in which head data of the data to be written is written.