首页> 外国专利> CHIP SIZE ESTIMATION DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND CHIP SIZE ESTIMATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT

CHIP SIZE ESTIMATION DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND CHIP SIZE ESTIMATION METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT

机译:半导体集成电路的芯片尺寸估计装置和半导体集成电路的芯片尺寸估计方法

摘要

PROBLEM TO BE SOLVED: To provide a chip size estimation device of a semiconductor integrated circuit and a chip estimation method of the semiconductor integrated circuit for accurately and easily estimating a chip size.SOLUTION: The chip size estimation device of a semiconductor integrated circuit includes: an input part 1 for inputting the minimum number of function gates as the number of gates which is absolutely necessary for the achievement of the function of a circuit; a set value storage part 21 for preliminarily setting the coefficient of the number of gates under the consideration of performance as the rate of the number of gates necessary for the achievement of a predetermined operating speed to the minimum number of function gates for every cell library; and a calculation part 22 for estimating the total area of the circuit by using the number of gates to be calculated from the minimum number of function gates and the coefficient of the number of gates under the consideration of performance.
机译:解决的问题:提供一种半导体集成电路的芯片尺寸估计装置和该半导体集成电路的芯片估计方法,以准确且容易地估计芯片尺寸。解决方案:半导体集成电路的芯片尺寸估计装置包括:输入部分1,用于输入最小数量的功能门作为实现电路功能必不可少的门数;设定值存储部分21,用于将考虑到性能的门的数目的系数预先设置为每个单元库的达到预定操作速度所需的门的数目与最小功能门的数目的比率;计算部分22,用于在考虑性能的情况下通过使用要从最小功能门的数量和门的数量系数计算出的门的数量来估计电路的总面积。

著录项

  • 公开/公告号JP2012243151A

    专利类型

  • 公开/公告日2012-12-10

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP20110113926

  • 发明设计人 YAMAMOTO YUJI;

    申请日2011-05-20

  • 分类号G06F17/50;H01L21/82;

  • 国家 JP

  • 入库时间 2022-08-21 16:58:00

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