MOS transistor circuit using double insulated gate field transistor and CMOS transistor circuit, SRAM cell circuit, CMOS-SRAM cell circuit, integrated circuit using the same

摘要

PROBLEM TO BE SOLVED: To provide a MOS transistor circuit and CMOS transistor circuit using a double insulated gate field transistor, an SRAM cell circuit, a CMOS-SRAM cell circuit and an integrated circuit which reconcile a high speed operation and a low power consumption in an unused, steady, or standby state of a unit circuit.SOLUTION: In a MOS transistor circuit comprising a four-terminal, double insulated gate field effect transistor, one gate of the four-terminal, double insulated gate field effect transistor is an input terminal, one end of a resistor is connected to the other gate, a source is connected to a first power source, a drain is an output terminal and is connected to a second power source via a load element, and the other end of the resistor is connected to a third power source of a constant potential.