Method for manufacturing silicon epitaxial wafer, the silicon epitaxial wafer, method of manufacturing integrated circuits and semiconductor devices or

摘要

The present invention, CVD oxide film is formed on the back side, at least boron or phosphorus and is doped at a concentration of 10 19 ^atoms / cm ³ or more 2.0 × silicon substrate, carbon ions were implanted from the surface are those carbon ion implantation layer due to is formed, and a silicon epitaxial wafer having an epitaxial layer is formed on a silicon substrate characterized by the epitaxial layer is formed on the surface of the carbon ion implanted layer is formed. This results from the low-resistance substrate than conventional epitaxial layer of a desired resistivity required to obtain the predetermined electrical characteristics of the device, the electrical characteristics of the imaging device such as a low-voltage power MOS, or medium voltage power MOS silicon epitaxial wafer was strongly suppressed as compared with the prior art can be implemented to improve auto-doping during heat treatment of the device manufacturing process or during epitaxial growth, the out-diffusion is provided.