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Z2FET Field-effect transistor with a vertical subthreshold slope and with no impact ionization

机译:Z 2 FET场效应晶体管,具有垂直亚阈值斜率且无碰撞电离

摘要

The transistor comprises first and second source/drain electrodes formed in a semiconductor film by N-doped and P-doped areas, respectively. A polarization voltage is applied between the two source/drain electrodes in order to impose to the P-doped electrode a potential higher than that of the N-doped electrode. The transistor comprises first and second devices for generating a potential barrier in the semiconductor film. The two potential barriers are opposed to the passage of the charge carriers emitted by the first and second source/drain electrodes, respectively. The two potential barriers are shifted with respect to an axis connecting the two source/drain electrodes. The two devices for generating a potential barrier are configured to generate a potential barrier having a variable amplitude and it are electrically connected to the gate and to the counter electrode.
机译:该晶体管包括分别在半导体膜中通过N掺杂和P掺杂区域形成的第一和第二源/漏电极。在两个源极/漏极电极之间施加极化电压,以便向P掺杂电极施加高于N掺杂电极的电位。该晶体管包括用于在半导体膜中产生势垒的第一和第二器件。这两个势垒分别与第一和第二源/漏电极发射的电荷载流子的通过相对。两个势垒相对于连接两个源/漏电极的轴移动。用于产生势垒的两个装置被配置为产生具有可变幅度的势垒,并且将其电连接到栅极和对电极。

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