FAULT DETECTION METHOD OF SEMICONDUCTOR MANUFACTURING PROCESSES AND SYSTEM ARCHITECTURE THEREOF

摘要

A fault detection method of semiconductor manufacturing processes is disclosed. The method includes the steps of providing a storage device, collecting a fault detection and classification(FDC) parameter by the storage device, setting up a measurement site for measuring an online measurement parameter, collecting a wafer acceptance test(WAT) in correspondence to the FDC parameter, establishing a first relationship equation between the FDC parameter and the online measurement parameter, establishing a second relationship equation of the online measurement parameter and the WAT by using the first relationship equation, establishing a third relationship equation between the FDC parameter and the WAT, establishing a waning region of the manufacturing processes by using the first, second, and third relationship equations, and determining the situation of generating wafer defects according to the warning region. The present invention discloses a system architecture for the method.