A MEMORY SYSTEM THAT UTILIZES A WIDE INPUT/OUTPUT (I/O) INTERFACE TO INTERFACE MEMORY STORAGE WITH AN INTERPOSER AND THAT UTILIZES A SERDES INTERFACE TO INTERFACE A MEMORY CONTROLLER WITH AN INTEGRATED CIRCUIT, AND A METHOD

摘要

A memory system is provided in which at least one DRAM chip and a memory controller chip are mounted in a side-by-side relationship on an interposer. The DRAM chip is connected to the interposer via a Wide I/O interface to enable the DRAM chip and the memory controller chip to communicate with each other via the Wide I/O interface. The memory controller chip has a SerDes interface for communicating with a SerDes interface of an integrated circuit (IC) chip of the memory system.