Transistor structure with a sidewall-defined intrinsic base to extrinsic base link-up region and method of forming the transistor

摘要

Disclosed are embodiments of a bipolar or heterojunction bipolar transistor and a method of forming the transistor. The transistor can incorporate a dielectric layer sandwiched between an intrinsic base layer and a raised extrinsic base layer to reduce collector-base capacitance C_cb, a sidewall-defined conductive strap for an intrinsic base layer to extrinsic base layer link-up region to reduce base resistance R_b and a dielectric spacer between the extrinsic base layer and an emitter layer to reduce base-emitter C_be capacitance. The method allows for self-aligning of the emitter to base regions and incorporates the use of a sacrificial dielectric layer, which must be thick enough to withstand etch and cleaning processes and still remain intact to function as an etch stop layer when the conductive strap is subsequently formed. A chemically enhanced high pressure, low temperature oxidation (HIPOX) process can be used to form such a sacrificial dielectric layer.