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High reliability and low power redundancy for memory
High reliability and low power redundancy for memory
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机译:存储器的高可靠性和低功耗冗余
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摘要
An integrated circuit containing a memory array, a redundancy circuit and a redundancy error correction circuit coupled to said redundancy circuit. A method for constructing a redundancy word which corresponds to each memory segment and a method for error checking the redundancy word during a memory access request.
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