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Method for reducing Fermi-Level-Pinning in a non-silicon channel MOS device

机译:减少非硅沟道MOS器件中费米能级固定的方法

摘要

A method to reduce (avoid) Fermi Level Pinning (FLP) in high mobility semiconductor compound channel such as Ge and III-V compounds (e.g. GaAs or InGaAs) in a Metal Oxide Semiconductor (MOS) device. The method is using atomic hydrogen which passivates the interface of the high mobility semiconductor compound with the gate dielectric and further repairs defects. The methods further improve the MOS device characteristics such that a MOS device with a quantum well is created.
机译:一种减少(避免)金属氧化物半导体(MOS)器件中诸如Ge和III-V化合物(例如GaAs或InGaAs)的高迁移率半导体化合物通道中的费米能级钉扎(FLP)的方法。该方法使用原子氢钝化高迁移率半导体化合物与栅极电介质的界面并进一步修复缺陷。该方法进一步改善了MOS器件的特性,从而创建了具有量子阱的MOS器件。

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