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Method of forming a bump-on-lead flip chip interconnection having higher escape routing density

机译:形成具有更高逸出布线密度的引线上凸块倒装芯片互连的方法

摘要

A flip chip interconnect is made by mating the interconnect bump directly onto a lead, rather than onto a capture pad. Also, a flip chip package includes a die having solder bumps attached to interconnect pads in an active surface, and a substrate having electrically conductive traces in a die attach surface, in which the bumps are mated directly onto the traces. In some embodiments the interconnection is formed without employing a solder mask. In some methods a curable adhesive is dispensed either onto the bumps on the die or onto the traces on the substrate; the adhesive is partly cured during the mating process, and the partly cured adhesive serves to confine the molten solder during a reflow process.
机译:倒装芯片互连是通过将互连凸块直接匹配到引线而不是捕获焊盘上而制成的。而且,倒装芯片封装包括:具有在活动表面中的焊料焊盘附接到互连焊盘的管芯;以及在管芯附接表面中具有导电迹线的衬底,其中凸块直接配合到迹线上。在一些实施例中,在不采用阻焊剂的情况下形成互连。在某些方法中,将可固化的胶粘剂分配到管芯上的凸块上或基板上的迹线上。在对接过程中,粘合剂会部分固化,而在回流过程中,部分固化的粘合剂会限制熔化的焊料。

著录项

  • 公开/公告号USRE44355E

    专利类型

  • 公开/公告日2013-07-09

    原文格式PDF

  • 申请/专利权人 STATS CHIPPAC LTD.;

    申请/专利号US201313750975

  • 发明设计人 RAJENDRA D. PENDSE;

    申请日2013-01-25

  • 分类号H01L21/44;

  • 国家 US

  • 入库时间 2022-08-21 16:43:18

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