Flip-flop circuit, pipeline circuit including flip-flop circuit, and method of operating flip-flop circuit

摘要

A flip flop circuit, a pipe line circuit including the same, and an operation method thereof are provided to perform a rapid operation and to reduce power consumption by pulling-down a voltage of an inner node by combination of a pull-down transistor. A pre-charge transistor(201) pre-charges an inner node into a first voltage according to a delay signal of a clock signal. A first pull down part pulls down the voltage of the inner node into a second voltage lower than the first voltage. A pull up transistor(205) pulls up a voltage of an output node according to a voltage of an inner node. A second pull down part pulls down the voltage of the output node into the second voltage. The first pull down part includes a first pull down transistor and a pull down transistor. The first pull down transistor(202) pulls down a voltage of an inner node. The second pull down transistor(203) pulls down a pulled down voltage into the second voltage by the first pull down transistor according to a first pulse signal.