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CIRCUIT TO PREVENT PEAK POWER PROBLEMS DURING SCAN SHIFT

机译:电路可防止扫描移位期间出现峰值功率问题

摘要

PROBLEM TO BE SOLVED: To provide scanning technics.;SOLUTION: A chip comprises first and second scan chain segments, and each segment comprises registers and multiplexers to provide scan input signals to the registers during a scan input period and captured output signals during a capture period. The chip also comprises a circuit to provide first and second test clock signals to the registers of the first and second scan chain segments, respectively. The second test clock signal is provided by a signal path in the circuit during the scan input period different from a signal path during the capture period, and during the scan input period a second test clock signal is skewed with respect to a first test clock signal. Other embodiments are described and claimed.;COPYRIGHT: (C)2014,JPO&INPIT
机译:解决的问题:提供扫描技术。解决方案:芯片包括第一和第二扫描链段,每个段包括寄存器和多路复用器,以在扫描输入周期内向寄存器提供扫描输入信号,并在捕获期间提供捕获的输出信号。期。该芯片还包括分别向第一和第二扫描链段的寄存器提供第一和第二测试时钟信号的电路。第二测试时钟信号在扫描输入周期期间不同于捕获期间的信号路径由电路中的信号路径提供,并且在扫描输入周期期间第二测试时钟信号相对于第一测试时钟信号偏斜。描述并要求保护其他实施例。版权所有:(C)2014,JPO&INPIT

著录项

  • 公开/公告号JP2014102254A

    专利类型

  • 公开/公告日2014-06-05

    原文格式PDF

  • 申请/专利权人 SILICON IMAGE INC;

    申请/专利号JP20140000591

  • 发明设计人 SUL CHINSONG;KIM HEON;

    申请日2014-01-06

  • 分类号G01R31/28;

  • 国家 JP

  • 入库时间 2022-08-21 16:18:22

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