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LOW CLOCK ENERGY DOUBLE-EDGE-TRIGGERED FLIP-FLOP CIRCUIT
LOW CLOCK ENERGY DOUBLE-EDGE-TRIGGERED FLIP-FLOP CIRCUIT
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机译:低时钟能量双边触发翻转电路
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摘要
A double-edge-triggered flip-flop circuit and a method for operating the double-edge-trigger flip-flop circuit are provided. Sub-circuits of a flip-flop circuit are coupled to a ground supply and decoupled the sub-circuits from a power supply when a clock signal is asserted. The sub-circuits generate trigger signals including a first pair of signals and a second pair of signals. The first pair of signals is evaluated, levels of the second pair of signals are maintained when the clock signal is asserted, and an output signal is transitioned to equal an input signal based on the trigger signals when the clock signal is asserted.
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