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METHOD FOR REDUCING MORPHOLOGICAL DIFFERENCE BETWEEN N-DOPED AND UNDOPED POLYSILICON GATES AFTER ETCHING

机译:减少刻蚀后N掺杂和未掺杂的多晶硅栅之间形态差异的方法

摘要

The present invention discloses a method for reducing the morphological difference between N-doped and undoped poly-silicon gates after etching, comprising the following sequential steps: depositing a hard mask layer on a substrate template having N-doped poly-silicon and undoped poly-silicon to form an N-doped poly-silicon hard mask layer and an undoped poly-silicon hard mask layer respectively, and etching the undoped poly-silicon hard mask layer to make a thickness difference between the N-doped poly-silicon hard mask layer and the undoped poly-silicon hard mask layer; depositing an anti-reflection layer, and etching according to a predetermined pattern until exposing the N-doped poly-silicon, wherein when the N-doped poly-silicon is exposed, the undoped poly-silicon is etched to a certain degree; and removing residuals on the surface of the above formed structure, and etching to form an N-doped poly-silicon gate and an undoped poly-silicon gate, respectively.
机译:本发明公开了一种减小刻蚀后N掺杂和未掺杂的多晶硅栅极之间的形貌差异的方法,包括以下顺序步骤:在具有N掺杂的多晶硅和未掺杂的多晶硅的衬底模板上沉积硬掩模层。硅分别形成N掺杂的多晶硅硬掩模层和未掺杂的多晶硅硬掩模层,并刻蚀未掺杂的多晶硅硬掩模层,以使N掺杂的多晶硅硬掩模层之间的厚度差未掺杂的多晶硅硬掩模层;沉积抗反射层,并按照预定的图案进行刻蚀,直至暴露出掺N的多晶硅,其中,当暴露掺N的多晶硅时,对未掺杂的多晶硅进行一定程度的刻蚀。去除上面形成的结构的表面上的残留物,并蚀刻以分别形成N掺杂的多晶硅栅极和未掺杂的多晶硅栅极。

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