首页> 外国专利> Method and apparatus for scrubbing accumulated disturb data errors in an array of SMT MRAM memory cells including rewriting reference bits

Method and apparatus for scrubbing accumulated disturb data errors in an array of SMT MRAM memory cells including rewriting reference bits

机译:用于清除包括重写参考位的SMT MRAM存储单元阵列中累积的干扰数据错误的方法和装置

摘要

A data scrubbing apparatus corrects disturb errors occurring in a memory cell array, such as SMT MRAM cells. The data scrubbing apparatus activates scrubbing of the data and associated error correction bits based on a number of errors corrected, at a power up of the memory cell array, or a programmed time interval. The data scrubbing apparatus may generate an address describing the location of the memory cells to be scrubbed. The data scrubbing apparatus then commands the array of memory cells to write back the corrected data, the associated error correction bits, and reference bits. The data scrubbing apparatus provides a busy indicator externally during a write back of corrected data.
机译:数据清理设备校正在诸如SMT MRAM单元的存储单元阵列中发生的干扰错误。数据清理设备在存储器单元阵列加电或编程的时间间隔的基础上,基于校正后的错误数激活数据和相关的纠错位的清理。数据清理设备可以生成描述要清理的存储单元的位置的地址。然后,数据清理设备命令存储单元阵列写回校正后的数据,相关的纠错位和参考位。数据清理设备在校正数据的写回期间在外部提供忙碌指示符。

著录项

  • 公开/公告号US8775865B2

    专利类型

  • 公开/公告日2014-07-08

    原文格式PDF

  • 申请/专利权人 HSU KAI YANG;

    申请/专利号US201113136292

  • 发明设计人 HSU KAI YANG;

    申请日2011-07-28

  • 分类号G06F11/00;G06F11/10;

  • 国家 US

  • 入库时间 2022-08-21 16:00:19

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