Data processing modules requiring different average clock frequencies having a common clock and a clock gating circuit for deleting clock pulses applied to the modules at times consistent with data sourcing and sinking capabilities

摘要

A method and apparatus are provided for docking data processing modules, which require differing average clock frequencies, and for transferring data between the modules. This comprises a means for providing a common dock signal to modules. Clock pulses are deleted from the common clock signal to individual modules in dependence on the docking frequency required by each module. Clock pulses are applied to modules between which data is to be transferred at times consistent with the data transfer.