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AN AREA-EFFICIENT PLL WITH A LOW-NOISE LOW-POWER LOOP FILTER
AN AREA-EFFICIENT PLL WITH A LOW-NOISE LOW-POWER LOOP FILTER
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机译:具有低噪声,低功耗环路滤波器的高效面积PLL
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摘要
Techniques for reducing noise and power consumption in a loop filter for a phase-locked loop (PLL) are described herein. In one embodiment, a loop filter for a PLL comprises a first proportional capacitor, a second proportional capacitor, an active device, and a plurality of switches. The plurality of switches are configured to alternately couple the first proportional capacitor and the second proportional capacitor to a first charge pump, to alternately couple noise from the active device to the first proportional capacitor and the second proportional capacitor, and to alternately couple the first proportional capacitor and the second proportional capacitor into a feedback circuit, wherein the feedback circuit produces an output voltage of the loop filter.
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