CIRCUIT DESIGN FOR MINIMIZING DIGITAL-JITTER IN PRECISION CLOCK

摘要

It is minimized the present invention relates to circuit design Digital dither and uses high precision clock. Particularly, 1 PPM classes of high-precision crystal oscillator (TCXO) use circuit design, and individually advanced LDO circuit is applied to the device that circuit design is applied to TCXO for other components from power supply so as to individual power supply. High precision clock is used using the minimum shake of Design of Digital Circuit, numerical data clock and the Digital dither of factor can cause power noise can be minimized with high precision. ;The 2014 of copyright KIPO submissions