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NON-VOLATILE MEMORY (NVM) WITH ADAPTIVE WRITE OPERATIONS

机译:具有自适应写操作的非易失性内存(NVM)

摘要

A method for performing a write operation on memory cells (202) of a memory array (201) comprises the steps of: applying a first plurality of pulses (402) of the write operation on the memory cells in accordance with a first predetermined ramp rate, wherein the first pulses are predetermined number of pulses; comparing a threshold voltage of a subset of the memory cells with an interim verify voltage; and if a threshold voltage of any of the subset of the memory cells fails the comparison with the interim verify voltage, continuing the write operation by applying a second plurality of pulses (406) on the memory cells in accordance with a second predetermined ramp rate which has an increased ramp rate as compared with the first predetermined ramp rate. [Reference numerals] (402) Initial ramp rate; (403) Determine a ramp rate; (404) Regular ramp rate; (406) Increased ramp rate; (408) Peak voltage; (410) Time-out
机译:一种用于在存储器阵列(201)的存储器单元(202)上执行写操作的方法,包括以下步骤:根据第一预定斜坡率在存储器单元上施加写操作的第一多个脉冲(402) ,其中第一脉冲是预定数量的脉冲;将存储单元的子集的阈值电压与临时验证电压进行比较;如果所述存储单元的所述子单元中的任何一个的阈值电压未能与所述中间验证电压进行比较,则通过根据第二预定斜坡率在所述存储单元上施加第二多个脉冲(406)来继续写操作。与第一预定斜坡率相比,具有更大的斜坡率。 [附图标记](402)初始斜率; (403)确定斜率; (404)正常斜率; (406)斜坡率增加; (408)峰值电压; (410)超时

著录项

  • 公开/公告号KR20140035843A

    专利类型

  • 公开/公告日2014-03-24

    原文格式PDF

  • 申请/专利权人 FREESCALE SEMICONDUCTOR INC.;

    申请/专利号KR20130109709

  • 发明设计人 HE CHEN;EGUCHI RICHARD K.;

    申请日2013-09-12

  • 分类号G11C16/12;G11C16/10;

  • 国家 KR

  • 入库时间 2022-08-21 15:43:23

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