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Reduction of threshold voltage variation in transistors comprises forming layer of silicon-containing semiconductor alloy on silicon-containing crystalline semiconductor regions, and forming two gate electrode structures
Reduction of threshold voltage variation in transistors comprises forming layer of silicon-containing semiconductor alloy on silicon-containing crystalline semiconductor regions, and forming two gate electrode structures
Reduction of threshold voltage variation in transistors comprises forming layer of silicon-containing semiconductor alloy on first and second silicon-containing crystalline semiconductor regions; removing layer of silicon-containing semiconductor alloy selectively from second silicon-containing crystalline semiconductor region; forming first gate electrode structure of first transistor on layer of silicon-containing semiconductor alloy; and forming second gate electrode structure of second transistor above second silicon-containing crystalline semiconductor region. Reduction of threshold voltage variation in transistors comprises forming layer of silicon-containing semiconductor alloy on first silicon-containing crystalline semiconductor region and second silicon-containing crystalline semiconductor region; removing layer of silicon-containing semiconductor alloy selectively from second silicon-containing crystalline semiconductor region; forming first gate electrode structure of first transistor on layer of silicon-containing semiconductor alloy; and forming second gate electrode structure of second transistor above second silicon-containing crystalline semiconductor region. The first and second gate electrode structures comprise high-dielectric constant (high-k) dielectric gate insulation layer and metal-containing gate electrode material formed on high-k dielectric gate insulation layer of gate electrode structure. An independent claim is included for semiconductor device.
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