首页> 外国专利> SEMICONDUCTOR INTEGRATED CIRCUIT, TESTING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT AND SUPPRESSION METHOD OF RUSH CURRENT IN SEMICONDUCTOR INTEGRATED CIRCUIT

SEMICONDUCTOR INTEGRATED CIRCUIT, TESTING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT AND SUPPRESSION METHOD OF RUSH CURRENT IN SEMICONDUCTOR INTEGRATED CIRCUIT

机译:半导体集成电路,半导体集成电路的测试方法和抑制半导体集成电路中的浪涌电流的方法

摘要

PROBLEM TO BE SOLVED: To easily detect a stuck-at fault of each of switches provided in parallel with regions which compose a semiconductor integrated circuit.;SOLUTION: In a semiconductor integrated circuit including a plurality of switch parts for each logic cell, each switch part includes: a power source switch provided on a power source line; a first latch part which latches a power source control signal input to an input terminal, for controlling the power source switch by switching a state to a conduction state or a non-conduction state in accordance with a first latch control signal input to an enable terminal and outputs the latched power source control signal from an output terminal; and a second latch part which latches in accordance with a second latch control signal input to the enable terminal, the power source control signal being to be input to the input terminal and latched by the first latch part, and outputs the power source control signal from the output terminal. The power source control signal output from the second latch part of a first switch part among the plurality of switch parts is input to the input terminal of the first latch part of a second switch part.;COPYRIGHT: (C)2015,JPO&INPIT
机译:解决的问题:为了容易地检测与构成半导体集成电路的区域并联设置的每个开关的卡住故障;解决方案:在包括用于每个逻辑单元的多个开关部分的半导体集成电路中,每个开关该部件包括:设置在电源线上的电源开关;以及第一锁存部分,其锁存输入到输入端子的电源控制信号,用于根据输入到使能端子的第一锁存控制信号,通过将状态切换为导通状态或非导通状态来控制电源开关并从输出端子输出锁存的电源控制信号;第二锁存器部分,其根据输入到使能端子的第二锁存器控制信号进行锁存,电源控制信号将被输入到输入端子并被第一锁存器锁存,并从输出端子。从多个开关部分中的第一开关部分的第二闩锁部分输出的电源控制信号输入到第二开关部分的第一闩锁部分的输入端子。版权所有:(C)2015,JPO&INPIT

著录项

  • 公开/公告号JP2015103893A

    专利类型

  • 公开/公告日2015-06-04

    原文格式PDF

  • 申请/专利权人 MEGA CHIPS CORP;

    申请/专利号JP20130241577

  • 发明设计人 TSUDA TOMOO;

    申请日2013-11-22

  • 分类号H03K19/00;H01L21/822;H01L27/04;G01R31/28;

  • 国家 JP

  • 入库时间 2022-08-21 15:33:11

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