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high-voltage power semiconductor devices on SiC

机译:SiC上的高压功率半导体器件

摘要

The 4H SiC epitaxial wafer of thickness 50~100 m, it is grown on the substrate of the off-angle 4 . From the inspection of the epitaxial wafer, in the range of 2~6cm -2 , surface morphological defect density was obtained. These epitaxial wafer, consistent carrier lifetime is obtained in the range of 2~3 s. By BPD density was reduced to less than 10cm -2 , in the epi-wafer, very low BPD density has been confirmed. Using the epitaxial wafer having a thickness of 50~100 m, to prepare a diode. By the high-pressure test, close blocking voltage to the theoretical value for the 4H-SiC has been demonstrated. 50 m in devices fabricated on the epitaxial film having a thickness, 8kV higher blocking voltage ones, 80 m in devices fabricated on the membrane of thickness, 10kV high blocking voltage ones, resulting. The failure analysis, triangular defects formed by particles present in surface damage or epitaxy is a fatal flaw, it was confirmed that the reverse bias operation of the device is caused to stop functioning. In addition, the leakage current in the high blocking voltage of the JBS diode, the correlation between the screw dislocation density was observed. The main source of basal plane dislocations in the epitaxial layer was also observed that from the crystal growth process.
机译:厚度为50〜100m的4H SiC外延晶片生长在斜角4的基板上。通过外延晶片的检查,在2〜6cm -2 的范围内,获得了表面形态缺陷密度。这些外延晶片在2〜3 s的范围内可获得一致的载流子寿命。通过将BPD密度减小到小于10cm -2 ,在外延晶片中,已经确认了非常低的BPD密度。使用厚度为50〜100m的外延晶片制备二极管。通过高压测试,已经证明了4H-SiC的闭锁电压接近理论值。在具有厚度的外延膜上制造的器件中50m,具有8kV的高阻断电压,在具有厚度的膜上制造的器件中具有80m,具有10kv的高阻断电压。失效分析表明,表面损坏或外延中存在的颗粒形成的三角形缺陷是致命缺陷,已确认该器件的反向偏置操作已导致其停止工作。另外,在JBS二极管的高阻断电压下的泄漏电流中,观察到螺钉位错密度之间的相关性。从晶体生长过程中还观察到外延层中基面位错的主要来源。

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