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Metal gate and high-k dielectric device having a PFET channel SiGe

机译:具有PFET通道SiGe的金属栅极和高k介电器件

摘要

Fabricating of semiconductor devices includes: depositing epitaxially a SiGe layer onto both NFET and PFET portions of a Si surface; blanket disposing a first sequence of layers over the SiGe layer including a high-k dielectric and a metal, incorporating the first sequence of layers into the gatestacks and gate insulators of both NFET devices and PFET devices; the first sequence of layers is selected to yield desired device parameter values for the PFET devices; removing the gatestack, the gate dielectric, and the SiGe layer for the NFET devices, re-forming the NFET devices by deploying a second sequence of layers that include a second high-k dielectric and a second metal; the second sequence of layers is selected to yield desired device parameter values for the NFET devices.
机译:半导体器件的制造包括:在Si表面的NFET和PFET部分上外延沉积SiGe层;覆盖在包括高k电介质和金属的SiGe层上方布置第一层序列,将第一层层合并到NFET器件和PFET器件的栅极堆叠和栅极绝缘体中;选择第一层序列以产生用于PFET器件的期望的器件参数值;去除用于NFET器件的栅叠层,栅极电介质和SiGe层,通过部署包括第二高k电介质和第二金属的第二层序列来重新形成NFET器件;选择第二层序列以产生用于NFET器件的期望的器件参数值。

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