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High-K metal gate electrode structures formed by cap layer removal without sacrificial spacer

机译:通过去除覆盖层而无需牺牲间隔物形成的高K金属栅电极结构

摘要

In sophisticated semiconductor devices, high-k metal gate electrode structures may be formed in an early manufacturing stage with superior integrity of sensitive gate materials by providing an additional liner material after the selective deposition of a strain-inducing semiconductor material in selected active regions. Moreover, the dielectric cap materials of the gate electrode structures may be removed on the basis of a process flow that significantly reduces the degree of material erosion in isolation regions and active regions by avoiding the patterning and removal of any sacrificial oxide spacers.
机译:在复杂的半导体器件中,可以在将应变诱导半导体材料选择性地沉积在选定的有源区域中之后,通过提供额外的衬里材料,在早期制造阶段以灵敏栅材料的优异完整性来形成高k金属栅电极结构。此外,可以基于工艺流程来去除栅电极结构的介电盖材料,该工艺流程通过避免图案化和去除任何牺牲性氧化物间隔物而显着降低了隔离区和有源区中的材料腐蚀程度。

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