首页> 外国专利> Process mitigated clock skew adjustment

Process mitigated clock skew adjustment

机译:减轻了时钟偏差调整的过程

摘要

A device includes process mitigating timing (PMT) circuitry. The PMT circuitry allows for adjustment of a clock signal while compensating for process variation within the PMT circuitry. The PMT circuitry may include process mitigating buffer (PMB) circuitry. The PMB circuitry may utilize replica circuitry and a calibrated resistance to generate a calibrated bias voltage. The calibrated bias voltage may be used to drive component buffer circuits to create a calibrated current response. The calibrated current response may correspond to a selected output impedance for the component buffer circuits. The select output impedance may be used in concert with a variable capacitance to adjust a clock signal in manner that is independent of the process variation within the PMT circuitry.
机译:一种设备,包括过程缓解定时(PMT)电路。 PMT电路允许调整时钟信号,同时补偿PMT电路内的工艺变化。 PMT电路可以包括过程减轻缓冲器(PMB)电路。 PMB电路可以利用复制电路和校准电阻来生成校准偏置电压。校准的偏置电压可用于驱动组件缓冲电路以创建校准的电流响应。校准的电流响应可以对应于部件缓冲电路的所选输出阻抗。选择输出阻抗可以与可变电容一起使用,以与PMT电路内的工艺变化无关的方式调节时钟信号。

著录项

  • 公开/公告号US9184737B1

    专利类型

  • 公开/公告日2015-11-10

    原文格式PDF

  • 申请/专利权人 BROADCOM CORPORATION;

    申请/专利号US201414332106

  • 发明设计人 JUN CAO;TAMER ALI;

    申请日2014-07-15

  • 分类号H03M1/10;H03K5/135;H03M1/12;

  • 国家 US

  • 入库时间 2022-08-21 15:18:37

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号