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Methods of forming germanium-containing and/or III-V nanowire gate-all-around transistors

机译:形成含锗和/或III-V纳米线全能栅极晶体管的方法

摘要

Methods of forming gate-all-around transistors which include a germanium-containing nanowire and/or an III-V compound semiconductor nanowire. Each method includes the growth of a germanium-containing material or an III-V compound semiconductor material that includes an upper portion and a lower portion within a nano-trench and on an exposed surface of a semiconductor layer. In some instances, the upper portion of the grown semiconductor material is used as the semiconductor nanowire. In other instances, the upper portion is removed and then a semiconductor etch stop layer and a nanowire template semiconductor material of a Ge-containing material or an III-V compound semiconductor material can be formed atop the lower portion. Upon subsequent processing, each nanowire template semiconductor material provides a semiconductor nanowire.
机译:形成包括含锗的纳米线和/或III-V族化合物半导体纳米线的环绕栅晶体管的方法。每种方法都包括生长含锗材料或III-V化合物半导体材料,该材料在纳米沟槽内以及半导体层的裸露表面上包括上部和下部。在某些情况下,生长的半导体材料的上部用作半导体纳米线。在其他情况下,去除上部,然后可以在下部的顶部上形成半导体蚀刻停止层和含Ge材料或III-V族化合物半导体材料的纳米线模板半导体材料。在随后的处理中,每种纳米线模板半导体材料提供半导体纳米线。

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