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Systems and methods for current density optimization in CMOS-integrated MEMS capacitive devices
Systems and methods for current density optimization in CMOS-integrated MEMS capacitive devices
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机译:CMOS集成MEMS电容性器件中用于电流密度优化的系统和方法
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摘要
The present subject matter relates to the use of current splitting and routing techniques to distribute current uniformly among the various layers of a device to achieve a high Q-factor. Such current splitting can allow the use of relatively narrow interconnects and feeds while maintaining a high Q. Specifically, for example a micro-electromechanical systems (MEMS) device can comprise a metal layer comprising a first portion and a second portion that is electrically separated from the first portion. A first terminus can be independently connected to each of the first portion and the second portion of the metal layer, wherein the first portion defines a first path between the metal layer and the first terminus, and the second portion defines a second path between the metal layer and the first terminus.
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