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Process to eliminate lag in pixels having a plasma-doped pinning layer

机译:消除具有等离子体掺杂钉扎层的像素中的滞后的过程

摘要

Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed.
机译:该方法的实施例包括在光敏区域上方,传输栅极的顶表面上方,以及至少最靠近光敏区域的传输栅极的侧壁上方的衬底表面上沉积牺牲层,该牺牲层具有衬底。选定的厚度。在牺牲层上方沉积一层光致抗蚀剂,对其进行构图和蚀刻,以在光敏区域和转移栅顶表面的至少一部分上暴露衬底的表面,从而在距离最近的转移栅侧壁上留下牺牲隔离物到感光区域。衬底被等离子体掺杂以在光敏区域和衬底的表面之间形成钉扎层。钉扎层和传输栅极的侧壁之间的间隔基本上对应于牺牲间隔物的厚度。公开并要求保护其他实施例。

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